The present invention relates to a receiver circuit, and more particularly, it relates to a receiver circuit suitably used for detecting, with low power consumption, a cable having come off in a data transfer system using the cable.
In general, in a data transfer system using a cable such as LVDS (Low Voltage Differential Signaling), a receiver circuit should have a function to detect a cable having come off and to fix the data output to a HIGH or LOW level in accordance with the current status of the system, and this function is designated as a fail safe function.
A conventional receiver circuit for realizing the fail safe function is shown in FIG. 6. This receiver circuit includes a data processing unit 1000 and a clock processing unit 2000.
The data processing unit 1000 includes an input buffer 1 and a 1:7 serial-parallel converter circuit 2 for converting a serial output signal RDATA of the input buffer 1 into parallel data in 7-bit groups and outputting the parallel data. A terminating resistor RT1 is connected between positive and negative input terminals RDP and RDM of the input buffer 1 for accepting differential data signals with small amplitude, a pull-up resistor RP1 is connected between the positive input terminal RDP and a power source VDD, and a pull-down resistor RP2 is connected between the negative input terminal RDM and a power source VSS.
The clock processing unit 2000 includes an input buffer 3 and a multiphase PLL circuit 4 for controlling the frequency and the phase of an output signal RCLOCK of the input buffer 3. The positive and negative input terminals INP and INM of the input buffer 3 for accepting differential clock signals with small amplitude are connected to a terminating resistor RT2, a pull-up resistor RP3 and a pull-down resistor RP4 in the same manner as in the input buffer 1 of the data processing unit 1000.
In this receiver circuit, the pull-up resistors RP1 and RP3 and the pull-down resistors RP2 and RP4 are used for realizing the fail safe function. When a cable has come off and is disconnected, for example, in the data processing unit 1000, a current passes through the three resistors, namely, the pull-up resistor RP1, the terminating resistor RT1 and the pull-down resistor RP2, and IR drop occurring in the terminating resistor RT1 is detected by the input buffer 1, so that the output level of the 1:7 serial-parallel converter circuit 2 can be fixed to a HIGH or LOW level. In this case, the terminating resistor RT1 is set to 100 Ω according to the LVDS standard.
In assuming, for example, that RP1=RP2=20 kΩ, RT1=100 Ω, VDD=3.3 V and VSS=0 V, a current, 3.3V/40.1 kΩ=82 uA, passes through the three resistors RP1, RT1 and RP2, and hence, a potential difference, 82 uA×100 Ω=8.2 mV, is caused in the terminating resistor RT1.
In the aforementioned conventional architecture, however, even in the case where the cable is normally connected and hence the fail safe function is not exhibited, a current steadily passes through the pull-up resistor RP1, the terminating resistor RT1 and the pull-down resistor RP2, which wastefully consumes power. In particular, when the number of data channels (i.e., the number of data processing units) is increased, the steady-state current increases in proportion to the number of data channels, and therefore, the wasteful power consumption is further increased.
In order to overcome this problem, when, for example, the pull-up resistor RP1 and the pull-down resistor RP2 are set to a larger value for reducing the current consumption, although the steady-state current passing through these resistors can be reduced, voltage drop caused in the terminating resistor RT1 is also reduced, resulting in increasing possibility of error detection of noise on the input data line.
As a result, noise resistance is lowered when the fail safe function is exhibited. Thus, the conventional architecture is not preferable.